3D Test Wrapper Chain Optimization with I/O Cells Binding Considered

Fan Hsuan Tang, Hsu Yu Kao, Shih Hsu Huang, Jin Fu Li

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

Previous 3D test wrapper chain synthesis algorithms do not consider the binding of I/O cells (i.e., the association between scan chains and I/O cells). However, the binding of I/O cells may be specified as synthesis constraints. In this paper, we propose a 3D test wrapper chain optimization algorithm with I/O cells binding considered. Our objective is not only to reduce the required test time but also to reduce the number of test TSVs (through-silicon-vias) under I/O cells binding constraints. Our experiments show that the proposed algorithm greatly reduces both test time and test TSV count.

Original languageEnglish
Title of host publicationIEEE 2019 International 3D Systems Integration Conference, 3DIC 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728148700
DOIs
StatePublished - Oct 2019
Event2019 IEEE International 3D Systems Integration Conference, 3DIC 2019 - Sendai, Japan
Duration: 8 Oct 201910 Oct 2019

Publication series

NameIEEE 2019 International 3D Systems Integration Conference, 3DIC 2019

Conference

Conference2019 IEEE International 3D Systems Integration Conference, 3DIC 2019
Country/TerritoryJapan
CitySendai
Period8/10/1910/10/19

Keywords

  • Optimization Algorithm
  • TSV Count
  • Test TSV
  • Test Time
  • Test Wrapper Chain Synthesis

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