1-transistor 1-source/channel/drain-diode (1T1D) One-time-programmable Memory in 14-nm FinFET

E. Ray Hsieh; Yu Ming Luo; Yi Xiang Huang; Huan Shiang Su; Rui Qi Lin; Yu Hsien Lin; Kai Hsiang Chang; Ting Ho Shen; Chuan Hsi Liu

doi:10.1109/LED.2023.3237626

1-transistor 1-source/channel/drain-diode (1T1D) One-time-programmable Memory in 14-nm FinFET

E. Ray Hsieh, Yu Ming Luo, Yi Xiang Huang, Huan Shiang Su, Rui Qi Lin, Yu Hsien Lin, Kai Hsiang Chang, Ting Ho Shen, Chuan Hsi Liu

Department of Electrical Engineering

Research output: Contribution to journal › Article › peer-review

Abstract

We present the 1-control-transistor and 1-source/channel/drain-diode(1T1D) one-time-programmable (OTP) memory cells implemented in 14-nm complementary fin Field-effect-transistors (FinFETs). The OTP cells are fully integrable in the complementary-metal-oxide-semi-conductor (CMOS) process without extra litho-masks. The feature size of a unit-cell is 14 F² (0.0502 μm²), which can be continually shrunk to 3-nm technology. The programming mechanism of the OTP is through the chain-effect induced by the impact-ionization between the channel-drain junction such that the junction structure is destructive, and the diode becomes blown, in terms of an effective open circuit. The pFinFET OTP can be programmed at -2.9 V; 3.1 V for the n-one. Moreover, programmed data can be retained in 200 °C for one month.

Original language	English
Pages (from-to)	1
Number of pages	1
Journal	IEEE Electron Device Letters
DOIs	https://doi.org/10.1109/LED.2023.3237626
State	Accepted/In press - 2023

Keywords

Avalanche-breakdown
Dielectrics
Electric breakdown
Embedded memory
FinFETs
Impact-ionization
Junctions
Logic gates
One-time-programmable (OTP) memory
Programming
Voltage

Access to Document

10.1109/LED.2023.3237626

Cite this

@article{d96970dc564548b7bf0fdea012d402fb,

title = "1-transistor 1-source/channel/drain-diode (1T1D) One-time-programmable Memory in 14-nm FinFET",

abstract = "We present the 1-control-transistor and 1-source/channel/drain-diode(1T1D) one-time-programmable (OTP) memory cells implemented in 14-nm complementary fin Field-effect-transistors (FinFETs). The OTP cells are fully integrable in the complementary-metal-oxide-semi-conductor (CMOS) process without extra litho-masks. The feature size of a unit-cell is 14 F2 (0.0502 μm2), which can be continually shrunk to 3-nm technology. The programming mechanism of the OTP is through the chain-effect induced by the impact-ionization between the channel-drain junction such that the junction structure is destructive, and the diode becomes blown, in terms of an effective open circuit. The pFinFET OTP can be programmed at -2.9 V; 3.1 V for the n-one. Moreover, programmed data can be retained in 200 °C for one month.",

keywords = "Avalanche-breakdown, Dielectrics, Electric breakdown, Embedded memory, FinFETs, Impact-ionization, Junctions, Logic gates, One-time-programmable (OTP) memory, Programming, Voltage",

author = "Hsieh, {E. Ray} and Luo, {Yu Ming} and Huang, {Yi Xiang} and Su, {Huan Shiang} and Lin, {Rui Qi} and Lin, {Yu Hsien} and Chang, {Kai Hsiang} and Shen, {Ting Ho} and Liu, {Chuan Hsi}",

note = "Publisher Copyright: IEEE",

year = "2023",

doi = "10.1109/LED.2023.3237626",

language = "???core.languages.en_GB???",

pages = "1",

journal = "IEEE Electron Device Letters",

issn = "0741-3106",

}

TY - JOUR

T1 - 1-transistor 1-source/channel/drain-diode (1T1D) One-time-programmable Memory in 14-nm FinFET

AU - Hsieh, E. Ray

AU - Luo, Yu Ming

AU - Huang, Yi Xiang

AU - Su, Huan Shiang

AU - Lin, Rui Qi

AU - Lin, Yu Hsien

AU - Chang, Kai Hsiang

AU - Shen, Ting Ho

AU - Liu, Chuan Hsi

N1 - Publisher Copyright: IEEE

PY - 2023

Y1 - 2023

N2 - We present the 1-control-transistor and 1-source/channel/drain-diode(1T1D) one-time-programmable (OTP) memory cells implemented in 14-nm complementary fin Field-effect-transistors (FinFETs). The OTP cells are fully integrable in the complementary-metal-oxide-semi-conductor (CMOS) process without extra litho-masks. The feature size of a unit-cell is 14 F2 (0.0502 μm2), which can be continually shrunk to 3-nm technology. The programming mechanism of the OTP is through the chain-effect induced by the impact-ionization between the channel-drain junction such that the junction structure is destructive, and the diode becomes blown, in terms of an effective open circuit. The pFinFET OTP can be programmed at -2.9 V; 3.1 V for the n-one. Moreover, programmed data can be retained in 200 °C for one month.

AB - We present the 1-control-transistor and 1-source/channel/drain-diode(1T1D) one-time-programmable (OTP) memory cells implemented in 14-nm complementary fin Field-effect-transistors (FinFETs). The OTP cells are fully integrable in the complementary-metal-oxide-semi-conductor (CMOS) process without extra litho-masks. The feature size of a unit-cell is 14 F2 (0.0502 μm2), which can be continually shrunk to 3-nm technology. The programming mechanism of the OTP is through the chain-effect induced by the impact-ionization between the channel-drain junction such that the junction structure is destructive, and the diode becomes blown, in terms of an effective open circuit. The pFinFET OTP can be programmed at -2.9 V; 3.1 V for the n-one. Moreover, programmed data can be retained in 200 °C for one month.

KW - Avalanche-breakdown

KW - Dielectrics

KW - Electric breakdown

KW - Embedded memory

KW - FinFETs

KW - Impact-ionization

KW - Junctions

KW - Logic gates

KW - One-time-programmable (OTP) memory

KW - Programming

KW - Voltage

UR - http://www.scopus.com/inward/record.url?scp=85147297904&partnerID=8YFLogxK

U2 - 10.1109/LED.2023.3237626

DO - 10.1109/LED.2023.3237626

M3 - 期刊論文

AN - SCOPUS:85147297904

SN - 0741-3106

SP - 1

JO - IEEE Electron Device Letters

JF - IEEE Electron Device Letters

ER -

1-transistor 1-source/channel/drain-diode (1T1D) One-time-programmable Memory in 14-nm FinFET

Abstract

Keywords

Access to Document

Fingerprint

Cite this