SAR 雷達回波頻域(Frequency Domain)數位處理架構

Project Details


In this project, we design hardware architecture for digital signal processing in the frequency domain for synthetic aperture radar (SAR) imaging. The functional blocks include range compression, secondary range compression, azimuth compressing and range cell migration correction. The configurable hardware accelerator aims to satisfy the requirements of real-time processing.
Effective start/end date25/06/2124/12/21

UN Sustainable Development Goals

In 2015, UN member states agreed to 17 global Sustainable Development Goals (SDGs) to end poverty, protect the planet and ensure prosperity for all. This project contributes towards the following SDG(s):

  • SDG 10 - Reduced Inequalities
  • SDG 12 - Responsible Consumption and Production
  • SDG 17 - Partnerships for the Goals


  • Synthetic Aperture Radar
  • Architecture Design


Explore the research topics touched on by this project. These labels are generated based on the underlying awards/grants. Together they form a unique fingerprint.