Reconfigurable Deep Neural Network Techniques for Supervised Learning(2/3)

Project Details

Description

Deep neural network (DNN) is one widely used artificial intelligence (AI) technique. The DNN engine in edge devices for the AI applications should meet the requirements of low energy, high flexibility, and short end-to-end latency. Therefore, we attempt to develop a reconfigurable DNN (RDNN) engine for the applications of human posture recognition and robotics to meet the requirements under the grand project entitled “Reconfigurable Deep Neural Network Engine for human posture recognition and robotics”. The innovations of the developed RDNN include: 1) support the supervised and reinforcement learning algorithms; 2) support various DNN models including compressed models; 3) use hybrid digital and analog computing units to minimize energy consumption; and 4) using posture and behavior recognition system to verify the performance of RDNN engine.This subproject entitled “Reconfigurable Deep Neural Network Techniques for Supervised Learning” attempts to develop reconfigurable design techniques for DNN with supervised learning. The innovations of this subproject include: 1) reconfigurable technique for CNNs under the constraint of end-to-end latency; 2) reconfigurable technique for various CNN models; 3) reconfigurable technique for hybrid digital and analog computing units.
StatusFinished
Effective start/end date1/08/2031/07/21

UN Sustainable Development Goals

In 2015, UN member states agreed to 17 global Sustainable Development Goals (SDGs) to end poverty, protect the planet and ensure prosperity for all. This project contributes towards the following SDG(s):

  • SDG 8 - Decent Work and Economic Growth
  • SDG 9 - Industry, Innovation, and Infrastructure

Keywords

  • Artificial Intelligence
  • Deep Neural Network
  • Supervised Learning
  • Reinforcement Learning
  • Reconfigurable
  • posture recognition
  • robotics

Fingerprint

Explore the research topics touched on by this project. These labels are generated based on the underlying awards/grants. Together they form a unique fingerprint.
  • Evaluating the Impact of Fault-Tolerance Capability of Deep Neural Networks Caused by Faults

    Tsai, Y. Y. & Li, J. F., 2021, Proceedings - 34th IEEE International System-on-Chip Conference, SOCC 2021. Qu, G., Xiong, J., Zhao, D., Muthukumar, V., Reza, M. F. & Sridhar, R. (eds.). IEEE Computer Society, p. 272-277 6 p. (International System on Chip Conference; vol. 2021-September).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    4 Scopus citations
  • Refresh Power Reduction of DRAMs in DNN Systems Using Hybrid Voting and ECC Method

    Hsieh, T. F., Li, J. F., Lai, J. S., Lo, C. Y., Kwai, D. M. & Chou, Y. F., Sep 2020, Proceedings - 2020 IEEE International Test Conference in Asia, ITC-Asia 2020. Institute of Electrical and Electronics Engineers Inc., p. 41-46 6 p. 9226545. (Proceedings - 2020 IEEE International Test Conference in Asia, ITC-Asia 2020).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  • Testing of Configurable 8T SRAMs for In-Memory Computing

    Li, J. F., Tsai, T. L., Hsu, C. L. & Sun, C. T., 23 Nov 2020, Proceedings - 2020 IEEE 29th Asian Test Symposium, ATS 2020. IEEE Computer Society, 9301535. (Proceedings of the Asian Test Symposium; vol. 2020-November).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    12 Scopus citations