With continuous increase in transistor count and clock frequency, the power density of current Si integrated circuits has reached a level that calls for a revolutionary change in transistor technology. Among the proposed approaches, High hole mobility Ge and high electron mobility InGaAs has been considered to be the most promising channel materials for p-channel and n-channel MOSFETs, respectively.However, transistor technology itself cannot warrant its deployment in future integrated circuits. The solutions for transistor integration as well as process integration in current fab must be sought and evaluated. This three-year project aims at monolithic integration of Ge and InGaAs CMOS FinFETs on Si. In the first year, material quality and epitaxial growth mechanisms of InGaAs on Ge patterned substrates (templates) with nanoscale ridges and trenches will be investigated. Based on the selective growth technology selected, nano-scale E-mode Ge and InGaAs FinFETs will be developed monolithically in the second year. Efforts will also be made to study the effects of process parameters on device characteristics so that a baseline process can be established timely for the task of the third year. The focus of the third year is to realize monolithically integrated Ge and InGaAs hybrid CMOS FinFETs on Si substrates. A CMOS inverter and ring oscillator will be demonstrated. .