As the speed of the network increases, the signal bandwidth of the data transmission must be increased. In order to overcome the bandwidth limitation of the copper twisted pair used in the existing Ethernet, IEEE Std 802.3bzTM-2016 (2.5GBASE- Both T & 5GBASE-T) and 10GBASE-T use the higher PAM16 (16-level Pulse Amplitude Modulation) and employ Low-Density Parity-Check (LDPC) encoding technology and Tomlinson-Harashima Precoder (THP) technology. However, THP avoids the error propagation of the Decision-Feedback Equalizer (DFE), but it must pay a higher cost of circuit chip implementation because the output signal of the PAM16 data signal through the THP is already an approximate continuous signal. In addition to the increase in analog circuit bandwidth, linearity and DAC/ADC (digital analog conversion / analog digital conversion) requirements have been greatly improved. In addition to and the increase in the operating speed of digital circuits due to the increase in signal bandwidth, the introduction of THP technology has greatly increased the complexity of echo cancellers and Near-End Crosstalk (NEXT) circuits. In addition, as the signal bandwidth expands, the RFI spectrum range covered by RF interference also increases. The goal of this project is to study the application of deep learning techniques to next-generation beyond Gigabit Ethernet PHY transceivers, such as the application of adaptive particle Swarm Optimization (PSO) algorithms to THP-based adaptive equalizers, IIR-based digital echo/NEXT cancellers, analog echo/NEXT cancellers, adaptive hybrid-circuit, and narrowband RFI cancellation/suppression, and apply the developed algorithm to IEEE Std 802.3bzTM-2016 next generation Multi-Gigabit Ethernet PHY transceiver design.
|Effective start/end date||1/01/20 → 31/12/20|
- Pulse Amplitude Modulation
- Tomlinson-Harashima Precoder
- Echo Canceller
- NEXT Canceller
- Deep Learning
- Particle Swarm Optimization
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