Chip Design and Implementation of High Enerigy-Efficiency Reconfigurable Neuromorphic Computing for Deep Learning Appications

Project Details


The current research on the circuit implementation of deep learning neural network engines can be divided into two categories: digital circuit implementation and ultra-low-power analog circuit implementation (ex., neuromorphic computing). In order to achieve more reduction in energy consumption, some studies have also proposed the use of emerging technologies to implement DNNs. The literature shows that the energy efficiency of analog neuromorphic computing for object recognition applications is about 100,000 times higher than that achieved by RISC software. The energy efficiency of analog neuromorphic computing is more than a hundred times higher than that of the CMOS digital circuit implementation, and the required area is only about 0.16 times that of the CMOS digital circuit implementation.The computer can process more complicated system due to the evolution of science and technology in recent years, and it also making the Artificial Intelligence (AI) get a second wind. As electronic devices continue to shrink in size, the latest advances in computing technology have enabled the design of wearable devices to achieve long-term continuous monitoring tasks, and have the potential to promote timely medical measures for treatment and care. In the biomedical signal, doctors often use Electrocardiogram (ECG) and Phonocardiogram (PCG) as the reference for judging heart disease. In addition, with the evolution of science and technology in recent years, the system can handle a larger number of operations, making Artificial Intelligence (AI) once again a research hotspot. Applying artificial intelligence to speech processing includes significantly reducing the Word Error Rate (WER) of speech recognition. It will improve automatic speech recognition (ASR) for more accurate and wide range by the applications through the Deep Neural Network (DNN).The main research direction of this project is to develop high-energy-efficient reconfigurable architecture and chip circuits for neuromorphic computing technology. It will focus on the design and specifications of basic neuron-related circuit architecture, neuromorphic computing architecture and modules. This project will propose a neuron cell model, which will form a Dendritic Neuron Model (DNM) architecture and use Particle Swarm Optimization (PSO) to implement deep learning for ECG/PCG recognition and speech recognition system, using the above-mentioned applications as a test and inspection platform to show the results of research and development.
Effective start/end date1/08/2030/09/21

UN Sustainable Development Goals

In 2015, UN member states agreed to 17 global Sustainable Development Goals (SDGs) to end poverty, protect the planet and ensure prosperity for all. This project contributes towards the following SDG(s):

  • SDG 7 - Affordable and Clean Energy
  • SDG 12 - Responsible Consumption and Production
  • SDG 17 - Partnerships for the Goals


  • Neuron Cell Model
  • Dendritic Neuron Model (DNM)
  • Particle Swarm Optimization (PSO)
  • Electrocardiogram (ECG)
  • Phonocardiogram (PCG)
  • Automatic Speech Recognition (ASR)


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