結合晶片翹曲量測與接合界面探討接合品質之研究

The biggest challenge of advanced packaging comes from heterogeneous integrated chips containing multiple materials, and complex 3D stacking can easily lead to wafer warpage. Silicon dioxide (SiO2) is widely applied as dielectric layer between conductive wires in semiconductor process. The thickness of dielectric layer reach to micro-scale in advanced packaging process. Due to micro-scale SiO2 layers and the mismatch of thermal expansion coefficients of various materials. Therefore, during the subsequent SiO2 bonding process, regions near the wafer's edge are susceptible to encountering bonding failures. For the purpose of preventing bonding failures, we aim to comprehensively understand the driving forces behind wafer warpage and their impact on bonding quality. In this study, cold field emission-scanning electron microscope (CFE-SEM), synchrotron radiation X-ray and transmission electron microscope (TEM) will be used to observe bonding interface and fracture surface of SiO2 samples after bonding. Shadow Moiré method and White Light Interferometry will be applied to wafer warpage measurement. Ultimately, we anticipate being able to assess the bond quality by utilizing the outcomes from the bonded interface analysis and wafer warpage measurements.