在重摻雜N型半導體或高純度矽晶材料中轉換介面壁壘型態使電洞流為主控電流,以進行表面陽極氧化合成奈米結構(1/3)

Project Details

StatusFinished
Effective start/end date1/08/2131/07/22

Fingerprint

Explore the research topics touched on by this project. These labels are generated based on the underlying awards/grants. Together they form a unique fingerprint.