Keyphrases
Negative Bias Temperature Instability
65%
Area Overhead
50%
3D IC
41%
Wake-up
38%
Aging
38%
Time Constraints
29%
Dynamic Voltage Scaling
26%
Leakage Power
26%
Graceful Degradation
25%
Through Silicon via
25%
Retention Register
25%
Concept Design
25%
Design Concept
25%
Multicore Systems
25%
Aging Effect
23%
Sleep Transistor
21%
Yield Constraints
21%
PMOS
21%
CAD Contest
19%
Energy Efficient
19%
Increased Reliability
19%
Electronic Design Automation
19%
Reliability Issues
18%
Power Consumption
17%
Fault Tolerance Mechanism
17%
Aging-aware
17%
Mode Transition
16%
Multi-bit
16%
Edge Devices
16%
Convolutional Neural Network
16%
IR Drop
15%
System Lifetime
15%
High Performance
15%
Timing Error
15%
Asymmetric Aging
14%
Machine Learning
14%
Industrial Design
14%
Power Gating
13%
Scaling Scheme
13%
Timing Failures
13%
Aging Monitoring
12%
Transition Detector
12%
Aging Resilience
12%
Low Power Optimization
12%
Cost Dynamics
12%
NbTi
12%
Algorithm Design
12%
Online Module
12%
IC Recycling
12%
Smart Devices
12%
Computer Science
Experimental Result
100%
Sleep Transistor
51%
Power Consumption
38%
Multicore System
32%
Timing Constraint
28%
Dynamic Voltage Scaling
28%
through silicon vias
25%
Graceful Degradation
25%
Convolutional Neural Network
21%
Integrated Circuits
20%
Computer Aided Design
19%
Electronic Design Automation
19%
Machine Learning
19%
Fault Tolerance Mechanism
17%
Reconfiguration
17%
Signal Integrity
17%
Threshold Voltage
17%
Neural Network
15%
Physical Design
14%
Parallelism
12%
Reconfigurable Logic
12%
Internet of Things
12%
Power Distribution Network
12%
Smart Device
12%
Task Parallelism
12%
Compressed Sensing
12%
Critical Path
12%
Prediction Framework
12%
Power Optimization
12%
Preventive Maintenance
12%
Transition Mode
12%
Global Routing
12%
Dynamic Power
12%
Power Efficiency
12%
Training Sample
11%
Dynamic Voltage
10%
Process Variation
9%
Clock Cycle
8%
Design Procedure
8%
Power Efficient
8%
Detection Method
8%
Speed-up
8%
Optimal Assignment
8%
Enabling Technique
8%
Supply Voltage
8%
Depthwise Separable Convolution
8%
Convolutional Neural Network
7%
Energy Efficient
6%
Boolean Logic
6%
Process Element
6%
Engineering
Experimental Result
43%
Area Overhead
29%
Storage Size
25%
Design Concept
25%
Sleep Mode
25%
Fits and Tolerances
20%
Clock Cycle
19%
Negative-Bias Temperature Instability
19%
Reliability Issue
14%
Supply Voltage
14%
Design for Reliability
12%
Three Dimensional Integrated Circuits
12%
Electric Power Distribution
12%
Power Distribution
12%
Energy Engineering
12%
Internet of Things
12%
Data Store
12%
System-on-Chip
12%
Single Bit
12%
Compressed Sensing
12%
Preventive Maintenance
12%
Concept Design
12%
Voltage Regulator
12%
Design Constraint
12%
Product Design
9%
Aging Effect
8%
Noise Margin
6%
Input Vector
6%
Control Vector
6%
Sensor Noise
6%
Performance Degradation
6%
Switching Activity
6%
Storage Area
6%
Internal Node
6%
Magnetic Tunnel Junction
6%
Gate Oxide
6%
Integrated Circuit Design
6%
Design Factor
6%
Prototype
6%
Space Solution
6%
Design Stage
6%
Excessive Leakage
6%
Design Element
6%
Processing Element
6%
Design Function
6%
