Projects per year
Personal profile
Research Expertise
Electronic design automation, chip aging mitigation and reliable chip design, low-power chip design optimization, in-memory computing (IMC)
Chip power distribution network (PDN) design and optimization, AI application in EDA
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Dive into the research topics where Yu-Guang Chen is active. These topic labels come from the works of this person. Together they form a unique fingerprint.
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Aging-Aware Low Power Design Reliability Analysis and Optimization Strategies(3/3)
1/01/20 → 31/10/20
Project: Research
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Aging-Aware Low Power Design Reliability Analysis and Optimization Strategies(2/3)
1/01/19 → 31/12/19
Project: Research
Research output
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A Hierarchical and Reconfigurable Process Element Design for Quantized Neural Networks
Chen, Y. G., Hsu, C. W., Chiang, H. Y., Hsieh, T. H. & Jou, J. Y., 2021, Proceedings - 34th IEEE International System-on-Chip Conference, SOCC 2021. Qu, G., Xiong, J., Zhao, D., Muthukumar, V., Reza, M. F. & Sridhar, R. (eds.). IEEE Computer Society, p. 278-283 6 p. (International System on Chip Conference; vol. 2021-September).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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An efficient NBTI-aware wake-up strategy: Concept, design, and manipulation
Chen, Y. G., Lin, I. C., Chiu, K. W. & Liu, C. H., Sep 2021, In: Integration, the VLSI Journal. 80, p. 60-71 12 p.Research output: Contribution to journal › Article › peer-review
2 Scopus citations -
A novel nbti-aware chip remaining lifetime prediction framework using machine learning
Chen, Y. G., Lin, I. C. & Wei, Y. C., 7 Apr 2021, Proceedings of the 22nd International Symposium on Quality Electronic Design, ISQED 2021. IEEE Computer Society, p. 476-481 6 p. 9424356. (Proceedings - International Symposium on Quality Electronic Design, ISQED; vol. 2021-April).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
2 Scopus citations -
A Reconfigurable Accelerator Design for Quantized Depthwise Separable Convolutions
Chen, Y. G., Chiang, H. Y., Hsu, C. W., Hsieh, T. H. & Jou, J. Y., 2021, Proceedings - International SoC Design Conference 2021, ISOCC 2021. Institute of Electrical and Electronics Engineers Inc., p. 290-291 2 p. (Proceedings - International SoC Design Conference 2021, ISOCC 2021).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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An Artificial Neuron Network Based Chip Health Assessment Framework for IC Recycling
Chen, Y. G., 28 Sep 2020, 2020 IEEE International Conference on Consumer Electronics - Taiwan, ICCE-Taiwan 2020. Institute of Electrical and Electronics Engineers Inc., 9258117. (2020 IEEE International Conference on Consumer Electronics - Taiwan, ICCE-Taiwan 2020).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review