Ying-Tsang Tang

Emailyttangee.ncu.edutw
Websitehttps://scholars.ncu.edu.tw/zh/persons/ying-tsang-tang

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Research activity per year

Research Expertise

Semiconductor high-dielectric materials, emerging semiconductor material computing, silicon-based quantum computer component simulation

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Tang, Y.-T. (PI)
1/01/22 → 31/12/22
Project: Research
超低功耗節能電子元件與鐵電記憶體的相變科學及其應用於人工智慧之技術突破
Tang, Y.-T. (PI)
1/12/18 → 31/12/21
Project: Research

27 Conference contribution
11 Article
1 Comment/debate

High-Fidelity and Noise-Resilient CNOT Gate Implementation Using Vertically Symmetric Fin-Based Architecture
Lai, W. Y., Yang, H. & Tang, Y. T., Feb 2026, In: IEEE Electron Device Letters. 47, 2, p. 221-224 4 p.
Research output: Contribution to journal › Article › peer-review
Enhanced Performance of P-FeFETs with TiN:2.5nm/Mo/TiN Gate Stacks for 3-bit-per-cell Operation, 3.5V Read-after-Write, and High Endurance (10⁹ Cycles) in Compute-in-Memory Applications
Tsai, C. Y., Hsiung, M. H., Chen, Y. C., Tsai, Y. T. & Tang, Y. T., 2025, 9th IEEE Electron Devices Technology and Manufacturing Conference: Shaping the Future with Innovations in Devices and Manufacturing, EDTM 2025. Institute of Electrical and Electronics Engineers Inc., (9th IEEE Electron Devices Technology and Manufacturing Conference: Shaping the Future with Innovations in Devices and Manufacturing, EDTM 2025).
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
Heterojunction Tunneling and Reverse Shockley-Read-Hall Recombination Effects in Si_1-xGe_x Channel/Si SDE CFETs for Steeper Subthreshold Swing and Low DIBL
Chang, P. L. & Tang, Y. T., 2025, 2025 Silicon Nanoelectronics Workshop, SNW 2025. Institute of Electrical and Electronics Engineers Inc., p. 114-115 2 p. (2025 Silicon Nanoelectronics Workshop, SNW 2025).
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
High-Storage, Low-Variability, and Low-Power Read-After-Write Superlattice HfO₂/ZrO₂ FeFET Memory Device by Using a Multifunctional MoO_x/TiON Layer
Chen, Z. K., Hsiung, M. H., Huang, Z. R., Wang, S. M., Liu, C. R., Chen, Y. T., Pai, C. S., Tasi, Y. T. & Tang, Y. T., 2025, In: IEEE Transactions on Electron Devices. 72, 6, p. 2930-2935 6 p.
Research output: Contribution to journal › Article › peer-review
2 Scopus citations
Reliability Analysis of CFETs Under Various NBTI Conditions
Kung, H. T., Thoti, N., Komsa, H. P. & Tang, Y. T., 2025, 2025 Silicon Nanoelectronics Workshop, SNW 2025. Institute of Electrical and Electronics Engineers Inc., p. 70-71 2 p. (2025 Silicon Nanoelectronics Workshop, SNW 2025).
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
1 Scopus citations

Supplement
Liu, C.-R. (Creator), Tsai, Y.-T. (Creator), Chen, Y.-T. (Creator), Chen, Z.-K. (Creator), Huang, Z.-R. (Creator), Wang, S.-M. (Creator), Pai, C.-S. (Creator) & Tang, Y. (Creator), AIP Publishing, 2024
DOI: 10.60893/figshare.jap.26412742.v1, https://aip.figshare.com/articles/figure/Supplement/26412742/1
Dataset
Supplement
Liu, C.-R. (Creator), Tsai, Y.-T. (Creator), Chen, Y.-T. (Creator), Chen, Z.-K. (Creator), Huang, Z.-R. (Creator), Wang, S.-M. (Creator), Pai, C.-S. (Creator) & Tang, Y. (Creator), AIP Publishing, 2024
DOI: 10.60893/figshare.jap.26412742, https://aip.figshare.com/articles/figure/Supplement/26412742
Dataset

Ying-Tsang Tang

Personal profile

Research Expertise

Fingerprint

Collaborations and top research areas from the last five years

Dive into details

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超低功耗節能電子元件與鐵電記憶體的相變科學及其應用於人工智慧之技術突破

High-Fidelity and Noise-Resilient CNOT Gate Implementation Using Vertically Symmetric Fin-Based Architecture

Enhanced Performance of P-FeFETs with TiN:2.5nm/Mo/TiN Gate Stacks for 3-bit-per-cell Operation, 3.5V Read-after-Write, and High Endurance (10⁹ Cycles) in Compute-in-Memory Applications

Heterojunction Tunneling and Reverse Shockley-Read-Hall Recombination Effects in Si_1-xGe_x Channel/Si SDE CFETs for Steeper Subthreshold Swing and Low DIBL

High-Storage, Low-Variability, and Low-Power Read-After-Write Superlattice HfO₂/ZrO₂ FeFET Memory Device by Using a Multifunctional MoO_x/TiON Layer

Reliability Analysis of CFETs Under Various NBTI Conditions

Supplement

Supplement

Ying-Tsang Tang

Personal profile

Research Expertise

Fingerprint

Collaborations and top research areas from the last five years

Projects

Research output

Datasets