Projects per year
Personal profile
Research Expertise
Computer Aided Design/Integrated Circuits and Systems/Computer Structure
Expertise related to UN Sustainable Development Goals
In 2015, UN member states agreed to 17 global Sustainable Development Goals (SDGs) to end poverty, protect the planet and ensure prosperity for all. This person’s work contributes towards the following SDG(s):
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Dive into the research topics where Jing-Yang Jou is active. These topic labels come from the works of this person. Together they form a unique fingerprint.
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Collaborations and top research areas from the last five years
Recent external collaboration on country/territory level. Dive into details by clicking on the dots or
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Synthesis and Optimization Techniques for Wdf-Based Analog Circuit Emulators(3/3)
1/08/20 → 31/07/21
Project: Research
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Synthesis and Optimization Techniques for Wdf-Based Analog Circuit Emulators(2/3)
1/08/19 → 31/07/20
Project: Research
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A Novel DNN Accelerator for Light-weight Neural Networks: Concept and Design
Chen, Y-G., Hsieh, T. H., Ho, Y. C. & Jou, J. Y., 2022, Proceeding - IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2022. Institute of Electrical and Electronics Engineers Inc., p. 250-253 4 p. (Proceeding - IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2022).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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1st- Order to 2nd Order Threshold Logic Gate Transformation with an Enhanced IPL-based identification Method
Zheng, L. C., Chang, H. J., Chen, Y. C. & Jou, J. Y., 18 Jan 2021, Proceedings of the 26th Asia and South Pacific Design Automation Conference, ASP-DAC 2021. Institute of Electrical and Electronics Engineers Inc., p. 469-474 6 p. 3431558. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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A Hierarchical and Reconfigurable Process Element Design for Quantized Neural Networks
Chen, Y. G., Hsu, C. W., Chiang, H. Y., Hsieh, T. H. & Jou, J. Y., 2021, Proceedings - 34th IEEE International System-on-Chip Conference, SOCC 2021. Qu, G., Xiong, J., Zhao, D., Muthukumar, V., Reza, M. F. & Sridhar, R. (eds.). IEEE Computer Society, p. 278-283 6 p. (International System on Chip Conference; vol. 2021-September).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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A Reconfigurable Accelerator Design for Quantized Depthwise Separable Convolutions
Chen, Y. G., Chiang, H. Y., Hsu, C. W., Hsieh, T. H. & Jou, J. Y., 2021, Proceedings - International SoC Design Conference 2021, ISOCC 2021. Institute of Electrical and Electronics Engineers Inc., p. 290-291 2 p. (Proceedings - International SoC Design Conference 2021, ISOCC 2021).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
1 Scopus citations -
Efficient circuit structure analysis for automatic behavioral model generation in mixed-signal system simulation
Song, L. Y., Lou, Y. K., Lin, C. H., Liu, C. N., Huang, J. D., Jou, J. Y., Lee, M. J. & Lo, Y. L., 1 May 2021, In: Electronics (Switzerland). 10, 9, 1088.Research output: Contribution to journal › Article › peer-review
Open Access
Impacts
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Sustainable Taoyuan Coast – Facilitating the Sustainable Development of Taoyuan’s Coastal Environment and Culture
Jing-Yang Jou (Participant), Way Sun (Participant), Horng-Yuan Yen (Participant), Yen-Hsyang Chu (Participant), Wu-Lung Chang (Participant), Chien-wen Shen (Participant), Chin-Hung Chou (Participant) & Zhi-Cheng Huang (Participant)
Impact: Social impacts